GDevCon-6/The Anatomy of a cRIO Module: Difference between revisions
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|abstract=How does the typical cRIO module work? What happens when a cRIO module is plugged into a chassis? What happens when a property or invoke node is placed on your FPGA block diagram? How does the cRIO controller know about the module’s capabilities? Does the cRIO controller really have a backplane? And why are cRIO modules hot-swappable? | |abstract=How does the typical cRIO module work? What happens when a cRIO module is plugged into a chassis? What happens when a property or invoke node is placed on your FPGA block diagram? How does the cRIO controller know about the module’s capabilities? Does the cRIO controller really have a backplane? And why are cRIO modules hot-swappable? | ||
Using information learned from building my own cRIO modules, and from writing the drivers in LabVIEW and XML, to creating an API, this talk will look at some of the magic that happens when a cRIO module is inserted into a chassis, and how the LabVIEW FPGA code interacts with cRIO modules. | Using information learned from building my own cRIO modules, and from writing the drivers in LabVIEW and XML, to creating an API, this talk will look at some of the magic that happens when a cRIO module is inserted into a chassis, and how the LabVIEW FPGA code interacts with cRIO modules. | ||
Latest revision as of 13:38, 5 February 2026
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| Conference | GDevCon#6 |
| Presenters | Gary Boorman |
The Anatomy of a cRIO Module by Gary Boorman
How does the typical cRIO module work? What happens when a cRIO module is plugged into a chassis? What happens when a property or invoke node is placed on your FPGA block diagram? How does the cRIO controller know about the module’s capabilities? Does the cRIO controller really have a backplane? And why are cRIO modules hot-swappable?
Using information learned from building my own cRIO modules, and from writing the drivers in LabVIEW and XML, to creating an API, this talk will look at some of the magic that happens when a cRIO module is inserted into a chassis, and how the LabVIEW FPGA code interacts with cRIO modules.