Logmanoriginal: Remove redlinks for individual error code pages.

2023-05-07T16:02:36Z

Remove redlinks for individual error code pages.

← Older revision		Revision as of 16:02, 7 May 2023
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	! Description		! Description
	\|-		\|-
	\| ~~[[Error Code~~ -1074101888~~\|-1074101888]]~~		\| -1074101888
	\| The register read command timed out.		\| The register read command timed out.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101887~~\|-1074101887]]~~		\| -1074101887
	\| The register write command timed out.		\| The register write command timed out.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101886~~\|-1074101886]]~~		\| -1074101886
	\| Bus instance exceeds the maximum number of bus instances.		\| Bus instance exceeds the maximum number of bus instances.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101885~~\|-1074101885]]~~		\| -1074101885
	\| Failed to read subsystem map. Device does not have correct signature. This could be due to a problem with the instruction target.		\| Failed to read subsystem map. Device does not have correct signature. This could be due to a problem with the instruction target.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101884~~\|-1074101884]]~~		\| -1074101884
	\| Failed to acquire subsystem map lock. The bus may be stalled. You may need to reset your target.		\| Failed to acquire subsystem map lock. The bus may be stalled. You may need to reset your target.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101883~~\|-1074101883]]~~		\| -1074101883
	\| Failed to look up the address space with the parameters specified. The corresponding address space might not be instantiated and connected to the instruction framework on the target. You may need to load a different bitfile on your FPGA target.		\| Failed to look up the address space with the parameters specified. The corresponding address space might not be instantiated and connected to the instruction framework on the target. You may need to load a different bitfile on your FPGA target.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101882~~\|-1074101882]]~~		\| -1074101882
	\| Version check error. Address space version is too old. Upgrade your firmware, or recompile your FPGA bitfile with newer library versions.		\| Version check error. Address space version is too old. Upgrade your firmware, or recompile your FPGA bitfile with newer library versions.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101881~~\|-1074101881]]~~		\| -1074101881
	\| Version check error. Address space version is too new. Upgrade your software, or use a compatible bitfile.		\| Version check error. Address space version is too new. Upgrade your software, or use a compatible bitfile.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101880~~\|-1074101880]]~~		\| -1074101880
	\| Invalid subsystem parameter.		\| Invalid subsystem parameter.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101879~~\|-1074101879]]~~		\| -1074101879
	\| Invalid address parameter.		\| Invalid address parameter.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101878~~\|-1074101878]]~~		\| -1074101878
	\| An error occured when flattening address spaces. The address spaces may be too large to fit into one subsystem.		\| An error occured when flattening address spaces. The address spaces may be too large to fit into one subsystem.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101877~~\|-1074101877]]~~		\| -1074101877
	\| Version check error. Insruction Framework FPGA library is too old. Upgrade your firmware, or recompile your FPGA bitfile with a newer version of the Instruction Framework.		\| Version check error. Insruction Framework FPGA library is too old. Upgrade your firmware, or recompile your FPGA bitfile with a newer version of the Instruction Framework.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101876~~\|-1074101876]]~~		\| -1074101876
	\| Version check error. Insruction Framework FPGA library is too new. Upgrade your software, or use a compatible bitfile.		\| Version check error. Insruction Framework FPGA library is too new. Upgrade your software, or use a compatible bitfile.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101875~~\|-1074101875]]~~		\| -1074101875
	\| The Register Port FIFO has overflowed. Contact National Instruments.		\| The Register Port FIFO has overflowed. Contact National Instruments.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101874~~\|-1074101874]]~~		\| -1074101874
	\| An FPGA subsystem returned an unknown non-negative error code.		\| An FPGA subsystem returned an unknown non-negative error code.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101873~~\|-1074101873]]~~		\| -1074101873
	\| A timeout occurred while waiting for Register Port reset to complete.		\| A timeout occurred while waiting for Register Port reset to complete.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101872~~\|-1074101872]]~~		\| -1074101872
	\| A timeout occurred while waiting for space in the Register Port input FIFO.		\| A timeout occurred while waiting for space in the Register Port input FIFO.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101871~~\|-1074101871]]~~		\| -1074101871
	\| An unexpected hardware failure occurred on the Instruction FIFO.		\| An unexpected hardware failure occurred on the Instruction FIFO.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101870~~\|-1074101870]]~~		\| -1074101870
	\| A timeout occurred while waiting for space in the Instruction FIFO.		\| A timeout occurred while waiting for space in the Instruction FIFO.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101869~~\|-1074101869]]~~		\| -1074101869
	\| A timeout occurred while waiting for a response from the Instruction FIFO.		\| A timeout occurred while waiting for a response from the Instruction FIFO.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101868~~\|-1074101868]]~~		\| -1074101868
	\| Failed to initialize the Instruction FIFO, due to an unexpected signature.		\| Failed to initialize the Instruction FIFO, due to an unexpected signature.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101867~~\|-1074101867]]~~		\| -1074101867
	\| Version check error. The Instruction FIFO FPGA library is outdated and is no longer supported by the software. Upgrade your firmware, or recompile your FPGA bitfile with newer source.		\| Version check error. The Instruction FIFO FPGA library is outdated and is no longer supported by the software. Upgrade your firmware, or recompile your FPGA bitfile with newer source.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101866~~\|-1074101866]]~~		\| -1074101866
	\| Version check error. Your software is outdated and is no longer supported by the Instruction FIFO FPGA library. Upgrade your software, or use a compatible bitfile.		\| Version check error. Your software is outdated and is no longer supported by the Instruction FIFO FPGA library. Upgrade your software, or use a compatible bitfile.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101865~~\|-1074101865]]~~		\| -1074101865
	\| An internal software error has occurred. The Instruction FIFO returned an unexpected read completion. Please contact technical support at http://ni.com/support.		\| An internal software error has occurred. The Instruction FIFO returned an unexpected read completion. Please contact technical support at http://ni.com/support.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101864~~\|-1074101864]]~~		\| -1074101864
	\| Version check error. Instruction framework plugin version is too old.		\| Version check error. Instruction framework plugin version is too old.
	\|-		\|-
	\| ~~[[Error Code~~ -1074101863~~\|-1074101863]]~~		\| -1074101863
	\| Version check error. Instruction framework plugin version is too new.		\| Version check error. Instruction framework plugin version is too new.
	\|}		\|}

	[[Category:Error Handling]]		[[Category:Error Handling]]

Q: Added page

2021-09-20T02:54:57Z

Added page

New page

Below are all of the Error Codes that belong to the '''NI Instruction Framework''' Error Code Family (see [[Error List]] for list of Families).

{| class="wikitable sortable"
! Code
! Description
|-
| [[Error Code -1074101888|-1074101888]]
| The register read command timed out.
|-
| [[Error Code -1074101887|-1074101887]]
| The register write command timed out.
|-
| [[Error Code -1074101886|-1074101886]]
| Bus instance exceeds the maximum number of bus instances.
|-
| [[Error Code -1074101885|-1074101885]]
| Failed to read subsystem map. Device does not have correct signature. This could be due to a problem with the instruction target.
|-
| [[Error Code -1074101884|-1074101884]]
| Failed to acquire subsystem map lock. The bus may be stalled. You may need to reset your target.
|-
| [[Error Code -1074101883|-1074101883]]
| Failed to look up the address space with the parameters specified. The corresponding address space might not be instantiated and connected to the instruction framework on the target. You may need to load a different bitfile on your FPGA target.
|-
| [[Error Code -1074101882|-1074101882]]
| Version check error. Address space version is too old. Upgrade your firmware, or recompile your FPGA bitfile with newer library versions.
|-
| [[Error Code -1074101881|-1074101881]]
| Version check error. Address space version is too new. Upgrade your software, or use a compatible bitfile.
|-
| [[Error Code -1074101880|-1074101880]]
| Invalid subsystem parameter.
|-
| [[Error Code -1074101879|-1074101879]]
| Invalid address parameter.
|-
| [[Error Code -1074101878|-1074101878]]
| An error occured when flattening address spaces. The address spaces may be too large to fit into one subsystem.
|-
| [[Error Code -1074101877|-1074101877]]
| Version check error. Insruction Framework FPGA library is too old. Upgrade your firmware, or recompile your FPGA bitfile with a newer version of the Instruction Framework.
|-
| [[Error Code -1074101876|-1074101876]]
| Version check error. Insruction Framework FPGA library is too new. Upgrade your software, or use a compatible bitfile.
|-
| [[Error Code -1074101875|-1074101875]]
| The Register Port FIFO has overflowed. Contact National Instruments.
|-
| [[Error Code -1074101874|-1074101874]]
| An FPGA subsystem returned an unknown non-negative error code.
|-
| [[Error Code -1074101873|-1074101873]]
| A timeout occurred while waiting for Register Port reset to complete.
|-
| [[Error Code -1074101872|-1074101872]]
| A timeout occurred while waiting for space in the Register Port input FIFO.
|-
| [[Error Code -1074101871|-1074101871]]
| An unexpected hardware failure occurred on the Instruction FIFO.
|-
| [[Error Code -1074101870|-1074101870]]
| A timeout occurred while waiting for space in the Instruction FIFO.
|-
| [[Error Code -1074101869|-1074101869]]
| A timeout occurred while waiting for a response from the Instruction FIFO.
|-
| [[Error Code -1074101868|-1074101868]]
| Failed to initialize the Instruction FIFO, due to an unexpected signature.
|-
| [[Error Code -1074101867|-1074101867]]
| Version check error. The Instruction FIFO FPGA library is outdated and is no longer supported by the software. Upgrade your firmware, or recompile your FPGA bitfile with newer source.
|-
| [[Error Code -1074101866|-1074101866]]
| Version check error. Your software is outdated and is no longer supported by the Instruction FIFO FPGA library. Upgrade your software, or use a compatible bitfile.
|-
| [[Error Code -1074101865|-1074101865]]
| An internal software error has occurred. The Instruction FIFO returned an unexpected read completion. Please contact technical support at http://ni.com/support.
|-
| [[Error Code -1074101864|-1074101864]]
| Version check error. Instruction framework plugin version is too old.
|-
| [[Error Code -1074101863|-1074101863]]
| Version check error. Instruction framework plugin version is too new.
|}

[[Category:Error Handling]]

NI Instruction Framework Error Code Family - Revision history

Logmanoriginal: Remove redlinks for individual error code pages.

Q: Added page